University of Houston
Department of Computer Science


In partial fulfillment of the Requirements for the Degree of
Master of Science


YAN WANG
will defend her thesis


DYNAMIC-MODE DVS ALGORITHM UNDER DYNAMIC WORKLOADS

Abstract

Dynamic Voltage Scaling (DVS) is a promising strategy to achieve energy saving by slowing down the processor into multiple frequency levels especially in battery-operated embedded real-time systems. Worst Case Execution Time (WCET) of the tasks scheduled by DVS must be known ahead of time to ensure their schedulability. However, in reality, a system's workloads may change significantly without satisfying any prediction of the Real Execution Time (RET).

 My thesis will present a novel Dynamic-Mode EDF scheduling algorithm when workloads change significantly. Either one of the Single-Mode, Dual-Mode and Three-Mode frequency settings can be applied, based on the Real Execution Time (RET) and the accumulated slack time at run time. Only one combination of the number of modes/speeds, speed-switching transition points, and the frequency scaling factor for each mode can lead to the best energy saving. Experimental results show that, given an RET pattern, our Dynamic-Mode DVS algorithm achieves an average 15% energy savings over the traditional two-mode DVS scheme on hard real-time systems.


Date: Monday, November 21, 2005
Time: 1:30 PM
Place: 550-PGH



Faculty, students, and the general public are invited.
Thesis Advisor: Dr. Albert M. K. Cheng