In
partial fulfillment of the Requirements for the Degree of
Master of Science
Aditya Toomula
will
defend his thesis
REPLICATING MEMORY ACCESSES FOR PERFORMANCE
PREDICTION
Abstract
We introduce a method to monitor an application and generate a short synthetic memory skeleton program whose memory access pattern is representative of the application. In particular, the application and its memory skeleton should have similar cache behavior on any memory hierarchy architecture. The objective is to quickly estimate the cache performance of an application on any memory architecture by running its memory skeleton. This thesis presents and validates a framework for automatic construction of memory skeletons. The approach is based on sampling the address trace of an executing application, summarizing it, and then employing it to generate a synthetic memory skeleton program.
The broad goal of this research is construction of performance skeletons designed to quickly estimate the performance of a large application in an unpredictable environment. A performance skeleton must also mimic the communication and execution behavior of the application. However, the memory behavior drives the performance of many scientific applications and hence memory skeletons are a critical component of this approach to performance estimation.
Date:
Time:
Place: 550-PGH
Faculty, students, and the general public are invited.
Thesis Advisor: Dr. Jaspal Subhlok